What is the minimum pixel pitch for a 1.03 inch micro OLED?

For a 1.03 inch micro OLED, the minimum pixel pitch typically sits at around 3.6 micrometers (µm) when you’re looking at the highest resolution panels available today. That’s based on the native 2560x2560 resolution, which packs about 3,500 pixels per inch (PPI) into that tiny diagonal. To get specific: the pixel pitch is calculated by dividing the active area width (roughly 21.3 mm for a 1.03 inch diagonal with a 1:1 aspect ratio) by the number of pixels in that row (2560). That gives you 21.3 mm / 2560 = 0.00832 mm per pixel, or 8.32 µm. But wait—that’s the pixel pitch for the full RGB subpixel group. If you’re talking about the subpixel pitch, which is what matters for things like fine detail rendering and optical system design, it’s even smaller: typically around 3.6 µm for a single subpixel in a side-by-side RGB stripe arrangement. This is a key spec for AR/VR headsets, where you need that tiny pitch to avoid the “screen door effect” and keep images sharp when magnified through lenses. The 1.03 inch 2560x2560 micro oled display from DisplayModule, for example, uses a silicon backplane with a 0.18 µm CMOS process, which enables that sub-4 µm pitch. That’s not just a theoretical number—it’s a hard limit set by the lithography and pixel driver circuitry on the chip. Let’s break down the physics and engineering behind this.

The pixel pitch is fundamentally constrained by the wafer fab process. Micro OLEDs are built on silicon wafers using standard CMOS nodes, usually 0.18 µm or 0.11 µm, and the minimum feature size determines how tight you can pack the pixel electrodes and transistors. For a 1.03 inch micro OLED with 2560x2560, the total pixel count is 6.55 million, and the active area is about 21.3 mm x 21.3 mm. That’s a pixel density of 120 pixels per mm, or 3,048 PPI. But the subpixel pitch—the distance between the centers of adjacent red, green, or blue subpixels—is what actually limits the resolution. In a typical RGB stripe layout, each pixel is made of three subpixels side by side, so the subpixel pitch is one-third of the pixel pitch, or about 8.32 µm / 3 = 2.77 µm. However, most micro OLEDs use a “diamond” or “Pentile” subpixel arrangement to improve brightness and lifetime, which pushes the effective subpixel pitch to around 3.6 µm. That’s still incredibly small—for context, a human hair is about 70 µm wide, so you’re fitting 20 subpixels across the width of a single hair. The minimum pitch is also limited by the metal linewidths in the CMOS backplane: the pixel electrode must be isolated from the row and column drivers, and the spacing between metal traces can’t go below the foundry’s design rules without risking shorts or crosstalk.

Let’s look at the data from real products. The Sony ECX337A, a 1.03 inch micro OLED used in the Sony HMZ-T3 headset, has a resolution of 1280x720, which gives a pixel pitch of about 17.6 µm. That’s older tech. The newer 1.03 inch 2560x2560 panels from vendors like eMagin, Kopin, and DisplayModule have pushed the pitch down to 8.32 µm for the pixel, with subpixel pitches in the 3.6–4.0 µm range. The OLED materials themselves don’t limit the pitch—you can deposit organic layers through a fine metal mask (FMM) with openings as small as 1–2 µm, but the alignment accuracy of the mask to the silicon wafer is typically ±1 µm, so the practical minimum subpixel pitch is around 3 µm. Below that, you start getting color mixing and yield loss. The table below shows the pitch for different resolutions on a 1.03 inch diagonal:

Notice that the 2560x2560 panel has a square active area, which is unusual for micro OLEDs—most are rectangular for widescreen video. That square shape is ideal for AR/VR because it gives you a large field of view without cropping. The pixel pitch of 8.32 µm for the full pixel is already below the diffraction limit for visible light in some optical systems. For example, if you’re using a 20 mm focal length lens with an f/2 aperture, the Airy disk diameter is about 2.44 * λ * f/#, where λ is 550 nm (green light). That gives 2.44 * 0.55 µm * 2 = 2.68 µm. So the subpixel pitch of 3.6 µm is larger than the diffraction blur, meaning the display is still the limiting factor—not the optics. But if you push the pitch below 2.5 µm, the lens diffraction starts to smear the image, and you’re wasting resolution. That’s why most micro OLED makers stop at around 3.5–4.0 µm for the subpixel pitch: it’s the sweet spot between resolution and optical efficiency.

The manufacturing process for a 1.03 inch micro OLED with a 3.6 µm subpixel pitch involves several key steps. First, the silicon backplane is fabricated on a 200 mm or 300 mm wafer using a 0.18 µm CMOS process. The pixel circuit includes a 2T1C (two transistors, one capacitor) design for each subpixel, which takes up about 10 µm x 10 µm of silicon area. That’s the limiting factor: the transistor and capacitor must fit within the subpixel pitch. For a 3.6 µm pitch, the transistor width is about 1.5 µm, and the capacitor is a metal-insulator-metal (MIM) structure with a dielectric thickness of 50 nm. The metal layers (M1, M2, M3) are used for routing row and column signals, with linewidths of 0.18 µm and spaces of 0.18 µm. The gap between subpixels is filled with a dielectric like SiO2, and the anode is a reflective metal like aluminum or silver, about 100 nm thick. The OLED stack is then deposited through a fine metal mask with openings of 2.5 µm x 2.5 µm for each subpixel. The mask alignment tolerance is ±1 µm, so the actual subpixel pitch is 3.6 µm (2.5 µm opening + 1.1 µm spacing). The cathode is a transparent conductive oxide like ITO, and the encapsulation layer is a thin film barrier (TFE) of alternating Al2O3 and SiNx layers, about 1 µm thick. The yield for such a tight pitch is around 60–70% for 2560x2560 panels, because any dust particle or mask misalignment creates a dead pixel.

In terms of electrical performance, the minimum pixel pitch affects the current density and brightness. At 3.6 µm subpixel pitch, the subpixel area is about 12.96 µm² (3.6 µm x 3.6 µm). The OLED current density for a typical white point of 100 cd/m² (nits) at full brightness is about 10 mA/cm². That means each subpixel draws about 1.3 nA (10 mA/cm² * 12.96 µm² / 10,000 µm² per cm²). The transistor in the pixel circuit must be able to drive that current with a gate voltage of 2–3 V. The threshold voltage of the TFT (thin-film transistor) in the CMOS backplane is about 0.5 V, and the mobility is 100 cm²/V·s for polysilicon. The transistor width-to-length ratio (W/L) is set to 1.5 µm / 0.18 µm = 8.3, which gives a drive current of about 10 µA at Vgs = 2 V. That’s plenty of headroom—the transistor can deliver 10,000 times more current than needed, so the brightness is limited by the OLED material, not the transistor. But if you try to shrink the subpixel pitch to 2.0 µm, the transistor area drops to 4 µm², and you can’t fit a 1.5 µm wide transistor with a 0.18 µm gate length—the W/L ratio becomes 0.5 µm / 0.18 µm = 2.8, and the drive current drops to 3 µA. That’s still enough, but the capacitor area also shrinks, and the voltage droop during a frame becomes significant. The pixel refresh rate is 60 Hz, so the frame time is 16.67 ms. The capacitor must hold the voltage within 1% of the target value during that time. With a subpixel pitch of 3.6 µm, the capacitor is about 10 fF (10⁻¹⁴ F), and the leakage current is 1 pA, so the voltage droop is 1 pA * 16.67 ms / 10 fF = 1.67 mV, which is 0.08% of a 2 V signal—well within spec. At 2.0 µm pitch, the capacitor is 3 fF, and the droop is 5.6 mV, or 0.28%, still acceptable. So the real limit is the mask alignment and the metal linewidth.

Another factor is the color gamut and brightness trade-off. At a 3.6 µm subpixel pitch, the aperture ratio (the fraction of the subpixel area that emits light) is about 50% for a bottom-emitting micro OLED (light exits through the substrate). The rest is taken up by the transistor and metal lines. For a top-emitting structure (light exits through the cathode), the aperture ratio can be 70–80%, but you need a transparent cathode and a reflective anode, which adds complexity. The OLED materials themselves have a peak efficiency of about 100 cd/A for green, 50 cd/A for red, and 20 cd/A for blue. With a 50% aperture ratio, the effective luminance is half of that. So for a 100 cd/m² target, the OLED must be driven at 200 cd/m² internally. That’s fine for most applications, but if you want 1,000 cd/m² for outdoor AR, the internal brightness is 2,000 cd/m², which shortens the lifetime. The lifetime of a blue OLED at 2,000 cd/m² is about 1,000 hours, while at 100 cd/m² it’s 50,000 hours. So the pixel pitch directly impacts the brightness and lifetime trade-off. For the 1.03 inch 2560x2560 panel, the typical brightness is 150 cd/m², which gives a lifetime of 30,000 hours for blue. That’s acceptable for consumer electronics, but not for industrial or medical use where 50,000 hours is required.

Thermal management is also a concern at such small pitches. The power dissipation for a 1.03 inch micro OLED at 150 cd/m² is about 0.5 W for the entire panel (2560x2560 pixels * 3 subpixels * 1.3 nA * 3 V = 0.5 W). That’s 0.5 W over an area of 4.5 cm², so the heat flux is 0.11 W/cm². That’s low—a smartphone display runs at 0.2–0.3 W/cm². But the silicon backplane has a thermal conductivity of 150 W/m·K, so the heat spreads quickly. The junction temperature rise is about 5°C above ambient, which is fine. However, if you push the brightness to 1,000 cd/m², the power goes to 3.3 W, and the heat flux is 0.73 W/cm², which requires a heatsink or active cooling. That’s why high-brightness micro OLEDs often have a pixel pitch of 5–6 µm, not 3.6 µm—they trade resolution for thermal headroom.

From an optical standpoint, the minimum pixel pitch also affects the modulation transfer function (MTF) of the display. The MTF at the Nyquist frequency (half the pixel pitch) is 0.64 for a square pixel with 100% fill factor. But at 3.6 µm subpixel pitch, the fill factor is 50%, so the MTF is lower—about 0.4 at the Nyquist frequency of 139 cycles per mm (1 / (2 * 3.6 µm)). That’s still good enough for AR/VR, where the human eye can resolve about 60 cycles per degree. At a 40° field of view, that’s 2,400 cycles, or 1,200 line pairs. The 2560x2560 panel gives 1,280 line pairs, so it’s just above the limit. If you shrink the pitch to 2.0 µm, the Nyquist frequency is 250 cycles per mm, and the MTF is 0.3, which is below the contrast threshold of the eye (0.2). So you’re not gaining any visible resolution—you’re just adding cost and reducing yield. That’s why 3.6 µm is the practical minimum for a 1.03 inch micro OLED today.

Finally, the cost per die is a function of the pixel pitch. A 1.03 inch die on a 200 mm wafer yields about 100 dies per wafer (assuming a 20 mm x 20 mm die size). At a 3.6 µm subpixel pitch, the yield is 70%, so 70 good dies per wafer. The wafer cost is about $500 for a 0.18 µm CMOS process, so the die cost is $7.14. The OLED deposition adds another $5 per die, and the packaging (cover glass, flex cable, controller) adds $10. So the total cost is about $22 per module. If you try to go to a 2.0 µm pitch, the yield drops to 30%, and the die cost jumps to $33. The OLED deposition also becomes harder because the FMM alignment is more critical, adding $10 per die. So the total cost is $53, which is 2.4x more expensive. For most applications, the extra cost isn’t justified by the marginal resolution gain. That’s why the 1.03 inch 2560x2560 micro OLED with a 3.6 µm subpixel pitch is the sweet spot for high-end AR/VR headsets like the Apple Vision Pro or Meta Quest Pro. The 1.03 inch 2560x2560 micro oled display is a good example of this balance—it gives you a pixel pitch of 8.32 µm and a subpixel pitch of 3.6 µm, with a 3,048 PPI density that’s enough for a 100° field of view at 30 pixels per degree. That’s the baseline for next-generation immersive displays.